See you at ESEC Japan 2013 !

2013 the Embedded Systems Expo and Conference (ESEC) from May 8th to the 10th. The event will take place at the Tokyo International Exhibition Center in Tokyo, Japan. We warmly invite all customers to come and meet us at the west hall, booth number: WEST 10-61.

At the 2013 ESEC, Acrosser will highlight its latest endeavors on 2 major applications: networkingand gaming. For networking, the latest Rackmount product from Acrosser, the ANR-IB75N1, will be on display during the entire event. As for gaming applications, Acrosser will exhibit its new All-in-OneGaming Board, AMB-A55EG1. The board features great computing and graphic performance, and high compatibility on multiple operation systems. In addition, Acrosser also stresses its focus on other product lines, including Single Board Computers and In Vehicle Computer AIV-HM76V0FL. 

We look forward to turning your dreams into reality at the 2013 ESEC!
We cordially invite you to visit our booth and discover our outstanding products!

New Product information：

(Networking Appliance)
ANR-IB75N1/A/B

http://www.acrosser.com/Products/Networking-Appliance/Rackmount/ANR-IB75N1／A／B/Networking-Appliance-ANR-IB75N1／A／B.html



(Gaming Platform)
AMB-A55EG1





http://www.acrosser.com/Products/Gaming-Platform/All-in-One-Gaming-Board/AMB-A55EG1/AMD-Embedded-G-Series-AMB-A55EG1.html

Contact：
http://www.acrosser.com/inquiry.html

Advances in EDA design methodologies led by next-generation FPGAs

FPGAs have become some of the most important drivers for development of leading edge semiconductor technology. The complexity of programmable devices, and their integration of diverse high-performance functions, provides excellent vehicles for testing new processes. It’s no accident that Intel has selected Achronix and Tabula, both makers of programmable devices, as the only partners that have been granted access to their 22 nm 3D Tri-Gate (FinFET) process. In February, Intel also announced an agreement with Altera, which will enable the company to manufacture FPGAs using their next-generation 14 nm Tri-Gate process.

In parallel with driving manufacturing, FPGA technology development must also include enhancements to design tools and flows. As vendors strive to make their devices more SoC- and ASIC-like, they are also adopting standards and collaborating with EDA companies to integrate their tools more seamlessly. These collaborations are producing great benefits for designers, as FPGA design methodologies are leading the way in areas that the EDA industry has long been promising new capabilities, such as in Electronic System Level (ESL) synthesis, IP integration and re-use, and higher-level tools for software/hardware co-design.

FPGA design methodologies have long integrated EDA point tools, such as simulation and PCB design, into FPGA vendor’s design platforms. Now, vendors such as Synopsys, with their Synplicity tools, and Xilinx with Vivado, are collaborating to build more complete integrated top-to-bottom flows. To address the greater complexity of FPGAs that may now contain up to two million equivalent logic cells, Synopsys has added Hierarchical Project Management (HPM) to Synplicity. HPM supports distributed design teams and parallel development, enabling partitioning of RTL and sharing of design debug tasks. Xilinx has adopted the industry-standard Synopsys Design Constraint (SDC) timing constraints (to replace Xilinx proprietary UDC) in a design flow that can be driven from standard Verilog HDL.

...

refer to :
http://dsp-fpga.com/articles/advances-in-eda-design-methodologies-led-by-next-generation-fpgas/

Embedded systems incorporate multiple analog sensors that make devices more intelligent

Many of today's embedded systems incorporate multiple analog sensors that make devices more intelligent, and provide users with an array of information resulting in improved efficiency or added convenience. The Analog Front End (AFE), allowing the connection of the sensor to the digital world of the MCU, is often an assumed "burden" in designing sensor interface circuits. However, the latest concept in a configurable AFE, integrated into a single package, is helping systems designers overcome sensor integration challenges associated with tuning and sensor drift, thereby reducing time to market. The following discussion examines how the versatility of such a technology allows the designer to tune and debug AFE characteristics on the fly, automate trimming and adjust for sensor drift, and add scalability to support multiple sensor types with a single platform.

The ubiquitous use of sensors in our smart devices – from cell phones to industrial equipment and even medical devices – has increased the need for more intelligent sensor technologies that are more versatile, lower overall costs, and require fewer resources to develop and maintain.

refer to : http://embedded-computing.com/articles/latest-afe-simplifies-interfacing-hundreds-sensors/#at_pco=cfd-1.0